diff --git a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp
index 6d31dbd760..2f5c315b83 100644
--- a/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp
+++ b/src/dynarmic/src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp
@@ -178,7 +178,7 @@ void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst)
         } else if constexpr (fsize == 64) {
             return Qto->D2();
         } else {
-            //static_assert(false);
+            return Qto->D2(); //static_assert(false);
         }
     }();
     auto Vfrom = [&] {
@@ -187,7 +187,7 @@ void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst)
         } else if constexpr (fsize == 64) {
             return Qfrom->D2();
         } else {
-            //static_assert(false);
+            return Qfrom->D2(); //static_assert(false);
         }
     }();
 
diff --git a/src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.cpp b/src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.cpp
index e5f6ec7e98..d1d1588062 100644
--- a/src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.cpp
+++ b/src/dynarmic/src/dynarmic/backend/arm64/reg_alloc.cpp
@@ -300,7 +300,7 @@ int RegAlloc::GenerateImmediate(const IR::Value& value) {
 
         return 0;
     } else {
-        //static_assert(false);
+        return 0;//static_assert(false);
     }
 }
 
@@ -369,7 +369,7 @@ int RegAlloc::RealizeReadImpl(const IR::Value& value) {
     } else if constexpr (required_kind == HostLoc::Kind::Flags) {
         ASSERT_FALSE("A simple read from flags is likely a logic error.");
     } else {
-        //static_assert(false);
+        return 0;//static_assert(false);
     }
 }
 
@@ -394,7 +394,7 @@ int RegAlloc::RealizeWriteImpl(const IR::Inst* value) {
         flags.SetupLocation(value);
         return 0;
     } else {
-        //static_assert(false);
+        return 0; //static_assert(false);
     }
 }
 
@@ -415,7 +415,7 @@ int RegAlloc::RealizeReadWriteImpl(const IR::Value& read_value, const IR::Inst*
     } else if constexpr (kind == HostLoc::Kind::Flags) {
         ASSERT_FALSE("Incorrect function for ReadWrite of flags");
     } else {
-        //static_assert(false);
+        return write_loc; //static_assert(false);
     }
 }
 
diff --git a/src/dynarmic/src/dynarmic/backend/riscv64/reg_alloc.cpp b/src/dynarmic/src/dynarmic/backend/riscv64/reg_alloc.cpp
index bb13bf3e21..b0128d6202 100644
--- a/src/dynarmic/src/dynarmic/backend/riscv64/reg_alloc.cpp
+++ b/src/dynarmic/src/dynarmic/backend/riscv64/reg_alloc.cpp
@@ -226,7 +226,7 @@ u32 RegAlloc::RealizeReadImpl(const IR::Value& value) {
         fprs[new_location_index].realized = true;
         return new_location_index;
     } else {
-        //static_assert(false);
+        return 0; //static_assert(false);
     }
 }
 
@@ -253,7 +253,7 @@ u32 RegAlloc::RealizeWriteImpl(const IR::Inst* value) {
         setup_location(fprs[new_location_index]);
         return new_location_index;
     } else {
-        //static_assert(false);
+        return 0;//static_assert(false);
     }
 }